8-Bit Arithmetic and Logic Unit Design using Mixed Type of Modeling in VHDL

This paper explains the design and implementation of 8-bit ALU (arithmetic and logic unit) using VHDL by using mixed style of modeling in Xilinx ISE 8.1i. The ALU takes two8-bits numbers and performs different principal arithmetic and logic operations like addition, multiplication, logical AND, OR, XOR, XNOR, NOR. The major focus of concern in this ALU is the multiplication operation using radix-4 booth algorithm and bit-pair recording technique which increases the speed of multiplication operation. We had followed modular programming approach so that our ALU is sub divided into smaller logical block. All the modules in arithmetic and logical unit design are realized using VHDL design. The top level design consists of arithmetic unit and logic unit which is implemented by using mixed type of modeling. Designing of this ALU is done by using VHDL and simulated using Xilinx ISE 8.1i [1].